###############################simulator settings#######################################################
set_var extsim_cmd_option "+spice" set_var extsim_deck_header "simulator lang=spectre\nSetOption1 options \nsimulator lang=spice" set_var extsim_option "method=gear gmin=1e-15 gmindefault=gmindc redefinedparams=ignore save=nooutput" set_var extsim_leakage_option "method=gear gmin=1e-15 gmindefault=gmindc redefinedparams=ignore save=nooutput" set_var extsim_cmd /tools/cadence/SPECTRE171/tools/bin/spectre set_var extsim_leakage /tools/cadence/SPECTRE171/tools/bin/spectretemplate.tcl
define_template -type delay \ -index_1 {0.008 0.28 } \ -index_2 {0.01 0.3 } \ delay_template_2x2 define_template -type power \ -index_1 {0.008 0.28 } \ -index_2 {0.01 0.3 } \ power_template_2x2 define_template -type si_immunity \ -index_1 {0.08 2.8 } \ -index_2 {0.01 0.3 } \ si_immunity_template_2x2 define_template -type constraint \ -index_1 {0.008 0.28 } \ -index_2 {0.008 0.28 } \ constraint_template_2x2
AND2X1 AND2X2 AND2X4 AND2X6 AND2X8 AND3X1 AND3X2 AND3X4 AND3X6 AND3X8 OR2X1 OR2X2 OR2X4 OR2X6 OR2X8 OR3X1 OR3X2 OR3X4 OR3X6 OR3X8 INVX12 INVX16 INVX1 INVX20 INVX2 INVX3 INVX4 INVX6 INVX8 INVXL NAND2X1 NAND2X2 NAND2X4 NAND2X6 NAND2X8 NAND3X1 NAND3X2 NAND3X4 NAND3X6 NAND3X8 NOR2X1 NOR2X2 NOR2X4 NOR2X6 NOR2X8 NOR3X1 NOR3X2 NOR3X4 NOR3X6 NOR3X8 XOR2X1 XOR2X2 XOR2X4 XOR2XL XOR3X1 XNOR2X1 XNOR2X2 XNOR2X4 XNOR2XL XNOR3X1 BUFX12 BUFX16 BUFX20 BUFX2 BUFX3 if {[ALAPI_active_cell "AND2X1"]} { define_cell \ -input { A B } \ -output { Y } \ -pinlist { A B Y } \ -delay delay_template_5x5 \ -power power_template_5x5 \ AND2X1 } if {[ALAPI_active_cell "AND2X2"]} { define_cell \ -input { A B } \ -output { Y } \ -pinlist { A B Y } \ -delay delay_template_5x5 \ -power power_template_5x5 \ AND2X2 } if {[ALAPI_active_cell "AND2X4"]} { define_cell \ -input { A B } \ -output { Y } \ -pinlist { A B Y } \ -delay delay_template_5x5 \ -power power_template_5x5 \ AND2X4 } if {[ALAPI_active_cell "AND2X6"]} { define_cell \ -input { A B } \ -output { Y } \ -pinlist { A B Y } \ -delay delay_template_5x5 \ -power power_template_5x5 \ AND2X6 } if {[ALAPI_active_cell "AND2X8"]} { define_cell \ -input { A B } \ -output { Y } \ -pinlist { A B Y } \ -delay delay_template_5x5 \ -power power_template_5x5 \ AND2X8 } if {[ALAPI_active_cell "AND3X1"]} { define_cell \ -input { A B C } \ -output { Y } \ -pinlist { A B C Y } \ -delay delay_template_5x5 \ -power power_template_5x5 \ AND3X1 } if {[ALAPI_active_cell "AND3X2"]} { define_cell \ -input { A B C} \ -output { Y } \ -pinlist { A B C Y } \ -delay delay_template_5x5 \ -power power_template_5x5 \ AND3X2 } if {[ALAPI_active_cell "AND3X4"]} { define_cell \ -input { A B C } \ -output { Y } \ -pinlist { A B C Y } \ -delay delay_template_5x5 \ -power power_template_5x5 \ AND3X4 } if {[ALAPI_active_cell "AND3X6"]} { define_cell \ -input { A B C } \ -output { Y } \ -pinlist { A B C Y } \ -delay delay_template_5x5 \ -power power_template_5x5 \ AND3X6 } if {[ALAPI_active_cell "AND3X8"]} { define_cell \ -input { A B C } \ -output { Y } \ -pinlist { A B C Y } \ -delay delay_template_5x5 \ -power power_template_5x5 \ AND3X8 } if {[ALAPI_active_cell "BUFX12"]} { define_cell \ -input { A } \ -output { Y } \ -pinlist { A Y } \ -delay delay_template_5x5 \ -power power_template_5x5 \ BUFX12 } if {[ALAPI_active_cell "BUFX16"]} { define_cell \ -input { A } \ -output { Y } \ -pinlist { A Y } \ -delay delay_template_5x5 \ -power power_template_5x5 \ BUFX16 } if {[ALAPI_active_cell "BUFX20"]} { define_cell \ -input { A } \ -output { Y } \ -pinlist { A Y } \ -delay delay_template_5x5 \ -power power_template_5x5 \ BUFX20 } if {[ALAPI_active_cell "BUFX2"]} { define_cell \ -input { A } \ -output { Y } \ -pinlist { A Y } \ -delay delay_template_5x5 \ -power power_template_5x5 \ BUFX2 } if {[ALAPI_active_cell "BUFX3"]} { define_cell \ -input { A } \ -output { Y } \ -pinlist { A Y } \ -delay delay_template_5x5 \ -power power_template_5x5 \ BUFX3 } if {[ALAPI_active_cell "DFF2X1"]} { define_cell \ -input { D1 D2 } \ -output { Q1 Q1N Q2 Q2N } \ -clock { CK } \ -pinlist { CK D1 D2 Q1 Q1N Q2 Q2N } \ -delay delay_template_5x5 \ -power power_template_5x5 \ -constraint constraint_template_5x5\ -mpw mpw_template_5x1\ DFF2X1 } if {[ALAPI_active_cell "DFF2X2"]} { define_cell \ -input { D1 D2 } \ -output { Q1 Q1N Q2 Q2N } \ -clock { CK } \ -pinlist { CK D1 D2 Q1 Q1N Q2 Q2N } \ -delay delay_template_5x5 \ -power power_template_5x5 \ -constraint constraint_template_5x5\ -mpw mpw_template_5x1\ DFF2X2 } if {[ALAPI_active_cell "DFF4RX1"]} { define_cell \ -input { D1 D2 D3 D4 RN} \ -output { Q1 Q1N Q2 Q2N Q3 Q3N Q4 Q4N } \ -clock { CK } \ -pinlist { CK D1 D2 D3 D4 RN Q1 Q1N Q2 Q2N Q3 Q3N Q4 Q4N } \ -delay delay_template_5x5 \ -power power_template_5x5 \ -constraint constraint_template_5x5\ -mpw mpw_template_5x1\ DFF4RX1 } if {[ALAPI_active_cell "DFF4RX2"]} { define_cell \ -input { D1 D2 D3 D4 RN} \ -output { Q1 Q1N Q2 Q2N Q3 Q3N Q4 Q4N } \ -clock { CK } \ -pinlist { CK D1 D2 D3 D4 RN Q1 Q1N Q2 Q2N Q3 Q3N Q4 Q4N } \ -delay delay_template_5x5 \ -power power_template_5x5 \ -constraint constraint_template_5x5\ -mpw mpw_template_5x1\ DFF4RX2 } if {[ALAPI_active_cell "DFF4X1"]} { define_cell \ -input { D1 D2 D3 D4 } \ -output { Q1 Q1N Q2 Q2N Q3 Q3N Q4 Q4N } \ -clock { CK } \ -pinlist { CK D1 D2 D3 D4 Q1 Q1N Q2 Q2N Q3 Q3N Q4 Q4N } \ -delay delay_template_5x5 \ -power power_template_5x5 \ -constraint constraint_template_5x5\ -mpw mpw_template_5x1\ DFF4X1 } if {[ALAPI_active_cell "DFF4X2"]} { define_cell \ -input { D1 D2 D3 D4 } \ -output { Q1 Q1N Q2 Q2N Q3 Q3N Q4 Q4N } \ -clock { CK } \ -pinlist { CK D1 D2 D3 D4 Q1 Q1N Q2 Q2N Q3 Q3N Q4 Q4N } \ -delay delay_template_5x5 \ -power power_template_5x5 \ -constraint constraint_template_5x5\ -mpw mpw_template_5x1\ DFF4X2 } if {[ALAPI_active_cell "NAND2X1"]} { define_cell \ -input { A B } \ -output { Y } \ -pinlist { A B Y } \ -delay delay_template_5x5 \ -power power_template_5x5 \ NAND2X1 } if {[ALAPI_active_cell "NAND2X2"]} { define_cell \ -input { A B } \ -output { Y } \ -pinlist { A B Y } \ -delay delay_template_5x5 \ -power power_template_5x5 \ NAND2X2 } if {[ALAPI_active_cell "NAND2X4"]} { define_cell \ -input { A B } \ -output { Y } \ -pinlist { A B Y } \ -delay delay_template_5x5 \ -power power_template_5x5 \ NAND2X4 } if {[ALAPI_active_cell "NAND2X6"]} { define_cell \ -input { A B } \ -output { Y } \ -pinlist { A B Y } \ -delay delay_template_5x5 \ -power power_template_5x5 \ NAND2X6 } if {[ALAPI_active_cell "NAND2X8"]} { define_cell \ -input { A B } \ -output { Y } \ -pinlist { A B Y } \ -delay delay_template_5x5 \ -power power_template_5x5 \ NAND2X8 } if {[ALAPI_active_cell "NAND3X1"]} { define_cell \ -input { A B C } \ -output { Y } \ -pinlist { A B C Y } \ -delay delay_template_5x5 \ -power power_template_5x5 \ NAND3X1 } if {[ALAPI_active_cell "NAND3X2"]} { define_cell \ -input { A B C} \ -output { Y } \ -pinlist { A B C Y } \ -delay delay_template_5x5 \ -power power_template_5x5 \ NAND3X2 } if {[ALAPI_active_cell "NAND3X4"]} { define_cell \ -input { A B C } \ -output { Y } \ -pinlist { A B C Y } \ -delay delay_template_5x5 \ -power power_template_5x5 \ NAND3X4 } if {[ALAPI_active_cell "NAND3X6"]} { define_cell \ -input { A B C } \ -output { Y } \ -pinlist { A B C Y } \ -delay delay_template_5x5 \ -power power_template_5x5 \ NAND3X6 } if {[ALAPI_active_cell "NAND3X8"]} { define_cell \ -input { A B C } \ -output { Y } \ -pinlist { A B C Y } \ -delay delay_template_5x5 \ -power power_template_5x5 \ NAND3X8 } if {[ALAPI_active_cell "NOR2X1"]} { define_cell \ -input { A B } \ -output { Y } \ -pinlist { A B Y } \ -delay delay_template_5x5 \ -power power_template_5x5 \ NOR2X1 } if {[ALAPI_active_cell "NOR2X2"]} { define_cell \ -input { A B } \ -output { Y } \ -pinlist { A B Y } \ -delay delay_template_5x5 \ -power power_template_5x5 \ NOR2X2 } if {[ALAPI_active_cell "NOR2X4"]} { define_cell \ -input { A B } \ -output { Y } \ -pinlist { A B Y } \ -delay delay_template_5x5 \ -power power_template_5x5 \ NOR2X4 } if {[ALAPI_active_cell "NOR2X6"]} { define_cell \ -input { A B } \ -output { Y } \ -pinlist { A B Y } \ -delay delay_template_5x5 \ -power power_template_5x5 \ NOR2X6 } if {[ALAPI_active_cell "NOR2X8"]} { define_cell \ -input { A B } \ -output { Y } \ -pinlist { A B Y } \ -delay delay_template_5x5 \ -power power_template_5x5 \ NOR2X8 } if {[ALAPI_active_cell "NOR3X1"]} { define_cell \ -input { A B C } \ -output { Y } \ -pinlist { A B C Y } \ -delay delay_template_5x5 \ -power power_template_5x5 \ NOR3X1 } if {[ALAPI_active_cell "NOR3X2"]} { define_cell \ -input { A B C} \ -output { Y } \ -pinlist { A B C Y } \ -delay delay_template_5x5 \ -power power_template_5x5 \ NOR3X2 } if {[ALAPI_active_cell "NOR3X4"]} { define_cell \ -input { A B C } \ -output { Y } \ -pinlist { A B C Y } \ -delay delay_template_5x5 \ -power power_template_5x5 \ NOR3X4 } if {[ALAPI_active_cell "NOR3X6"]} { define_cell \ -input { A B C } \ -output { Y } \ -pinlist { A B C Y } \ -delay delay_template_5x5 \ -power power_template_5x5 \ NOR3X6 } if {[ALAPI_active_cell "NOR3X8"]} { define_cell \ -input { A B C } \ -output { Y } \ -pinlist { A B C Y } \ -delay delay_template_5x5 \ -power power_template_5x5 \ NOR3X8 } if {[ALAPI_active_cell "INV_X12"]} { define_cell \ -input { A } \ -output { Y } \ -pinlist { A Y } \ -delay delay_template_5x5 \ -power power_template_5x5 \ INV_X12 } if {[ALAPI_active_cell "INV_X16"]} { define_cell \ -input { A } \ -output { Y } \ -pinlist { A Y } \ -delay delay_template_5x5 \ -power power_template_5x5 \ INV_X16 } if {[ALAPI_active_cell "INV_X1"]} { define_cell \ -input { A } \ -output { Y } \ -pinlist { A Y } \ -delay delay_template_5x5 \ -power power_template_5x5 \ INV_X1 } if {[ALAPI_active_cell "INV_X20"]} { define_cell \ -input { A } \ -output { Y } \ -pinlist { A Y } \ -delay delay_template_5x5 \ -power power_template_5x5 \ INV_X20 } if {[ALAPI_active_cell "INV_X2"]} { define_cell \ -input { A } \ -output { Y } \ -pinlist { A Y } \ -delay delay_template_5x5 \ -power power_template_5x5 \ INV_X2 } if {[ALAPI_active_cell "INV_X3"]} { define_cell \ -input { A } \ -output { Y } \ -pinlist { A Y } \ -delay delay_template_5x5 \ -power power_template_5x5 \ INV_X3 } if {[ALAPI_active_cell "INV_X4"]} { define_cell \ -input { A } \ -output { Y } \ -pinlist { A Y } \ -delay delay_template_5x5 \ -power power_template_5x5 \ INV_X4 } if {[ALAPI_active_cell "INV_X6"]} { define_cell \ -input { A } \ -output { Y } \ -pinlist { A Y } \ -delay delay_template_5x5 \ -power power_template_5x5 \ INV_X6 } if {[ALAPI_active_cell "INV_X8"]} { define_cell \ -input { A } \ -output { Y } \ -pinlist { A Y } \ -delay delay_template_5x5 \ -power power_template_5x5 \ INV_X8 } if {[ALAPI_active_cell "INV_XL"]} { define_cell \ -input { A } \ -output { Y } \ -pinlist { A Y } \ -delay delay_template_5x5 \ -power power_template_5x5 \ INV_XL } if {[ALAPI_active_cell "XOR2X1"]} { define_cell \ -input { A B } \ -output { Y } \ -pinlist { A B Y } \ -delay delay_template_5x5 \ -power power_template_5x5 \ XOR2X1 } if {[ALAPI_active_cell "XOR2X2"]} { define_cell \ -input { A B } \ -output { Y } \ -pinlist { A B Y } \ -delay delay_template_5x5 \ -power power_template_5x5 \ XOR2X2 } if {[ALAPI_active_cell "XOR2X4"]} { define_cell \ -input { A B } \ -output { Y } \ -pinlist { A B Y } \ -delay delay_template_5x5 \ -power power_template_5x5 \ XOR2X4 } if {[ALAPI_active_cell "XOR2XL"]} { define_cell \ -input { A B } \ -output { Y } \ -pinlist { A B Y } \ -delay delay_template_5x5 \ -power power_template_5x5 \ XOR2XL } if {[ALAPI_active_cell "XOR3X1"]} { define_cell \ -input { A B C } \ -output { Y } \ -pinlist { A B C Y } \ -delay delay_template_5x5 \ -power power_template_5x5 \ XOR3X1 } if {[ALAPI_active_cell "XNOR2X1"]} { define_cell \ -input { A B } \ -output { Y } \ -pinlist { A B Y } \ -delay delay_template_5x5 \ -power power_template_5x5 \ XNOR2X1 } if {[ALAPI_active_cell "XNOR2X2"]} { define_cell \ -input { A B } \ -output { Y } \ -pinlist { A B Y } \ -delay delay_template_5x5 \ -power power_template_5x5 \ XNOR2X2 } if {[ALAPI_active_cell "XNOR2X4"]} { define_cell \ -input { A B } \ -output { Y } \ -pinlist { A B Y } \ -delay delay_template_5x5 \ -power power_template_5x5 \ XNOR2X4 } if {[ALAPI_active_cell "XNOR2XL"]} { define_cell \ -input { A B } \ -output { Y } \ -pinlist { A B Y } \ -delay delay_template_5x5 \ -power power_template_5x5 \ XNOR2XL } if {[ALAPI_active_cell "XNOR3X1"]} { define_cell \ -input { A B C } \ -output { Y } \ -pinlist { A B C Y } \ -delay delay_template_5x5 \ -power power_template_5x5 \ XNOR3X1 }
NAND Based DFF || Liberty Fornat
NAND Based DFF || Liberty Format
library (TT_25_1.1) {
/* Models written by Liberate dev from Cadence Design Systems, Inc. on Fri Feb 22 02:47:41 IST 2019 */ comment : ""; date : "$Date: Fri Feb 22 02:46:37 2019 $"; revision : "1.0"; delay_model : table_lookup; capacitive_load_unit (1,pf); current_unit : "1mA"; leakage_power_unit : "1uW"; pulling_resistance_unit : "1kohm"; time_unit : "1ns"; voltage_unit : "1V"; voltage_map (vdd, 1.1); voltage_map (vss, 0); voltage_map (vnw, 1.1); voltage_map (vpw, 0); voltage_map (GND, 0); default_cell_leakage_power : 0; default_fanout_load : 1; default_max_transition : 0.48; default_output_pin_cap : 0; in_place_swap_mode : match_footprint; input_threshold_pct_fall : 50; input_threshold_pct_rise : 50; nom_process : 1; nom_temperature : 25; nom_voltage : 1.1; output_threshold_pct_fall : 50; output_threshold_pct_rise : 50; slew_derate_from_library : 1; slew_lower_threshold_pct_fall : 10; slew_lower_threshold_pct_rise : 10; slew_upper_threshold_pct_fall : 90; slew_upper_threshold_pct_rise : 90; operating_conditions (PVT_1P1V_25C) { process : 1; temperature : 25; voltage : 1.1; } default_operating_conditions : PVT_1P1V_25C; lu_table_template (constraint_template_2x2) { variable_1 : constrained_pin_transition; variable_2 : related_pin_transition; index_1 ("0.008, 0.28"); index_2 ("0.008, 0.28"); } lu_table_template (delay_template_2x2) { variable_1 : input_net_transition; variable_2 : total_output_net_capacitance; index_1 ("0.008, 0.28"); index_2 ("0.01, 0.3"); } lu_table_template (mpw_constraint_template_2x2) { variable_1 : constrained_pin_transition; index_1 ("0.008, 0.28"); } power_lut_template (passive_power_template_2x1) { variable_1 : input_transition_time; index_1 ("0.008, 0.28"); } power_lut_template (power_template_2x2) { variable_1 : input_transition_time; variable_2 : total_output_net_capacitance; index_1 ("0.008, 0.28"); index_2 ("0.01, 0.3"); } cell (dff) { area : 0; cell_leakage_power : 6.5263e-05; pg_pin (vdd) { pg_type : primary_power; voltage_name : "vdd"; } pg_pin (vss) { pg_type : primary_ground; voltage_name : "vss"; } leakage_power () { value : 5.981e-05; when : "clk * d"; related_pg_pin : vdd; } leakage_power () { value : 0; when : "clk * d"; related_pg_pin : vss; } leakage_power () { value : 6.30108e-05; when : "clk * !d"; related_pg_pin : vdd; } leakage_power () { value : 0; when : "clk * !d"; related_pg_pin : vss; } leakage_power () { value : 6.75152e-05; when : "!clk * d"; related_pg_pin : vdd; } leakage_power () { value : 0; when : "!clk * d"; related_pg_pin : vss; } leakage_power () { value : 7.07159e-05; when : "!clk * !d"; related_pg_pin : vdd; } leakage_power () { value : 0; when : "!clk * !d"; related_pg_pin : vss; } leakage_power () { value : 6.5263e-05; related_pg_pin : vdd; } leakage_power () { value : 0; related_pg_pin : vss; } pin (q) { direction : output; function : "Iq"; power_down_function : "(!vdd) + (vss)"; related_ground_pin : vss; related_power_pin : vdd; max_capacitance : 0.0114337; max_transition : 0.660627; timing () { related_pin : "clk"; timing_sense : non_unate; timing_type : rising_edge; cell_rise (delay_template_2x2) { index_1 ("0.0004, 0.48"); index_2 ("0.0001, 0.0114337"); values ( \ "0.0253775, 0.342199", \ "0.0853786, 0.402961" \ ); } rise_transition (delay_template_2x2) { index_1 ("0.0004, 0.48"); index_2 ("0.0001, 0.0114337"); values ( \ "0.0361037, 0.660627", \ "0.0443858, 0.660365" \ ); } cell_fall (delay_template_2x2) { index_1 ("0.0004, 0.48"); index_2 ("0.0001, 0.0114337"); values ( \ "0.0525863, 0.73217", \ "0.112628, 0.794371" \ ); } fall_transition (delay_template_2x2) { index_1 ("0.0004, 0.48"); index_2 ("0.0001, 0.0114337"); values ( \ "0.0254806, 0.44908", \ "0.0258223, 0.450091" \ ); } } timing () { related_pin : "d"; timing_sense : positive_unate; timing_type : combinational; cell_rise (delay_template_2x2) { index_1 ("0.0004, 0.48"); index_2 ("0.0001, 0.0114337"); values ( \ "0.0282231, 0.344363", \ "0.0801555, 0.397341" \ ); } rise_transition (delay_template_2x2) { index_1 ("0.0004, 0.48"); index_2 ("0.0001, 0.0114337"); values ( \ "0.0359804, 0.659768", \ "0.03686, 0.660262" \ ); } cell_fall (delay_template_2x2) { index_1 ("0.0004, 0.48"); index_2 ("0.0001, 0.0114337"); values ( \ "0.0479078, 0.727377", \ "0.144271, 0.865358" \ ); } fall_transition (delay_template_2x2) { index_1 ("0.0004, 0.48"); index_2 ("0.0001, 0.0114337"); values ( \ "0.0260919, 0.449646", \ "0.0322259, 0.449759" \ ); } } timing () { related_pin : "q_bar"; sdf_cond : "clk == 1'b1 & d == 1'b0"; timing_sense : negative_unate; timing_type : combinational_rise; when : "clk * !d"; cell_rise (delay_template_2x2) { index_1 ("0.0004, 0.48"); index_2 ("0.0001, 0.0114337"); values ( \ "0.0129677, 0.17515", \ "0.103261, 0.339963" \ ); } rise_transition (delay_template_2x2) { index_1 ("0.0004, 0.48"); index_2 ("0.0001, 0.0114337"); values ( \ "0.027408, 0.353946", \ "0.108684, 0.393911" \ ); } } timing () { related_pin : "q_bar"; sdf_cond : "clk == 1'b0 & d == 1'b1"; timing_sense : negative_unate; timing_type : combinational; when : "!clk * d"; cell_rise (delay_template_2x2) { index_1 ("0.0004, 0.48"); index_2 ("0.0001, 0.0114337"); values ( \ "0.0132939, 0.175349", \ "0.103744, 0.34159" \ ); } rise_transition (delay_template_2x2) { index_1 ("0.0004, 0.48"); index_2 ("0.0001, 0.0114337"); values ( \ "0.019536, 0.347754", \ "0.0908304, 0.385726" \ ); } cell_fall (delay_template_2x2) { index_1 ("0.0004, 0.48"); index_2 ("0.0001, 0.0114337"); values ( \ "0.0139538, 0.19292", \ "0.0788037, 0.33372" \ ); } fall_transition (delay_template_2x2) { index_1 ("0.0004, 0.48"); index_2 ("0.0001, 0.0114337"); values ( \ "0.0187347, 0.368661", \ "0.0804829, 0.398846" \ ); } } timing () { related_pin : "q_bar"; sdf_cond : "clk == 1'b0 & d == 1'b0"; timing_sense : negative_unate; timing_type : combinational; when : "!clk * !d"; cell_rise (delay_template_2x2) { index_1 ("0.0004, 0.48"); index_2 ("0.0001, 0.0114337"); values ( \ "0.0143934, 0.17642", \ "0.108101, 0.342316" \ ); } rise_transition (delay_template_2x2) { index_1 ("0.0004, 0.48"); index_2 ("0.0001, 0.0114337"); values ( \ "0.0205079, 0.348727", \ "0.0919997, 0.386359" \ ); } cell_fall (delay_template_2x2) { index_1 ("0.0004, 0.48"); index_2 ("0.0001, 0.0114337"); values ( \ "0.0117895, 0.152987", \ "0.0771024, 0.306792" \ ); } fall_transition (delay_template_2x2) { index_1 ("0.0004, 0.48"); index_2 ("0.0001, 0.0114337"); values ( \ "0.0156575, 0.284952", \ "0.0822211, 0.3251" \ ); } } timing () { related_pin : "q_bar"; timing_sense : negative_unate; timing_type : combinational; cell_rise (delay_template_2x2) { index_1 ("0.0004, 0.48"); index_2 ("0.0001, 0.0114337"); values ( \ "0.0143934, 0.17642", \ "0.108101, 0.342316" \ ); } rise_transition (delay_template_2x2) { index_1 ("0.0004, 0.48"); index_2 ("0.0001, 0.0114337"); values ( \ "0.027408, 0.353946", \ "0.108684, 0.393911" \ ); } cell_fall (delay_template_2x2) { index_1 ("0.0004, 0.48"); index_2 ("0.0001, 0.0114337"); values ( \ "0.0139538, 0.19292", \ "0.0788037, 0.33372" \ ); } fall_transition (delay_template_2x2) { index_1 ("0.0004, 0.48"); index_2 ("0.0001, 0.0114337"); values ( \ "0.0187347, 0.368661", \ "0.0822211, 0.398846" \ ); } } internal_power () { related_pin : "clk"; related_pg_pin : vdd; rise_power (power_template_2x2) { index_1 ("0.0004, 0.48"); index_2 ("0.0001, 0.0114337"); values ( \ "0.000203742, 0.000203907", \ "0.000191358, 0.000197074" \ ); } fall_power (power_template_2x2) { index_1 ("0.0004, 0.48"); index_2 ("0.0001, 0.0114337"); values ( \ "0.000228595, 0.000234012", \ "0.000215593, 0.000230434" \ ); } } internal_power () { related_pin : "clk"; related_pg_pin : vss; rise_power (power_template_2x2) { index_1 ("0.0004, 0.48"); index_2 ("0.0001, 0.0114337"); values ( \ "0.000226645, 0.000209225", \ "0.000214076, 0.000208158" \ ); } fall_power (power_template_2x2) { index_1 ("0.0004, 0.48"); index_2 ("0.0001, 0.0114337"); values ( \ "0.000221618, 0.000222336", \ "0.000208911, 0.000226952" \ ); } } internal_power () { related_pin : "d"; when : "clk"; related_pg_pin : vdd; rise_power (power_template_2x2) { index_1 ("0.0004, 0.48"); index_2 ("0.0001, 0.0114337"); values ( \ "0.000232867, 0.000238105", \ "0.000229692, 0.000242789" \ ); } fall_power (power_template_2x2) { index_1 ("0.0004, 0.48"); index_2 ("0.0001, 0.0114337"); values ( \ "0.00033972, 0.000351458", \ "0.000341023, 0.000360852" \ ); } } internal_power () { related_pin : "d"; when : "clk"; related_pg_pin : vss; rise_power (power_template_2x2) { index_1 ("0.0004, 0.48"); index_2 ("0.0001, 0.0114337"); values ( \ "0.00035276, 0.000348818", \ "0.000349847, 0.000361663" \ ); } fall_power (power_template_2x2) { index_1 ("0.0004, 0.48"); index_2 ("0.0001, 0.0114337"); values ( \ "0.000218745, 0.000231401", \ "0.000220189, 0.000236775" \ ); } } } pin (q_bar) { direction : output; function : "Iq_bar"; power_down_function : "(!vdd) + (vss)"; related_ground_pin : vss; related_power_pin : vdd; max_capacitance : 0.0110726; max_transition : 0.653388; timing () { related_pin : "clk"; timing_sense : non_unate; timing_type : rising_edge; cell_rise (delay_template_2x2) { index_1 ("0.0004, 0.48"); index_2 ("0.0001, 0.0110726"); values ( \ "0.0253742, 0.332116", \ "0.0854344, 0.392812" \ ); } rise_transition (delay_template_2x2) { index_1 ("0.0004, 0.48"); index_2 ("0.0001, 0.0110726"); values ( \ "0.0359936, 0.640673", \ "0.044282, 0.640768" \ ); } cell_fall (delay_template_2x2) { index_1 ("0.0004, 0.48"); index_2 ("0.0001, 0.0110726"); values ( \ "0.0523003, 0.7104", \ "0.112345, 0.772569" \ ); } fall_transition (delay_template_2x2) { index_1 ("0.0004, 0.48"); index_2 ("0.0001, 0.0110726"); values ( \ "0.0252017, 0.435203", \ "0.0255452, 0.436151" \ ); } } timing () { related_pin : "d"; timing_sense : negative_unate; timing_type : combinational; cell_rise (delay_template_2x2) { index_1 ("0.0004, 0.48"); index_2 ("0.0001, 0.0110726"); values ( \ "0.0223041, 0.328275", \ "0.108907, 0.465797" \ ); } rise_transition (delay_template_2x2) { index_1 ("0.0004, 0.48"); index_2 ("0.0001, 0.0110726"); values ( \ "0.0357302, 0.640465", \ "0.0883265, 0.653388" \ ); } cell_fall (delay_template_2x2) { index_1 ("0.0004, 0.48"); index_2 ("0.0001, 0.0110726"); values ( \ "0.054328, 0.712798", \ "0.131335, 0.765232" \ ); } fall_transition (delay_template_2x2) { index_1 ("0.0004, 0.48"); index_2 ("0.0001, 0.0110726"); values ( \ "0.0254933, 0.437307", \ "0.0513025, 0.437587" \ ); } } timing () { related_pin : "q"; sdf_cond : "clk == 1'b1 & d == 1'b1"; timing_sense : negative_unate; timing_type : combinational_rise; when : "clk * d"; cell_rise (delay_template_2x2) { index_1 ("0.0004, 0.48"); index_2 ("0.0001, 0.0110726"); values ( \ "0.0129271, 0.170003", \ "0.103223, 0.334767" \ ); } rise_transition (delay_template_2x2) { index_1 ("0.0004, 0.48"); index_2 ("0.0001, 0.0110726"); values ( \ "0.0273217, 0.343498", \ "0.108586, 0.384369" \ ); } } timing () { related_pin : "q"; sdf_cond : "clk == 1'b0 & d == 1'b1"; timing_sense : negative_unate; timing_type : combinational; when : "!clk * d"; cell_rise (delay_template_2x2) { index_1 ("0.0004, 0.48"); index_2 ("0.0001, 0.0110726"); values ( \ "0.0143939, 0.171279", \ "0.108099, 0.336393" \ ); } rise_transition (delay_template_2x2) { index_1 ("0.0004, 0.48"); index_2 ("0.0001, 0.0110726"); values ( \ "0.020417, 0.338275", \ "0.091909, 0.3762" \ ); } cell_fall (delay_template_2x2) { index_1 ("0.0004, 0.48"); index_2 ("0.0001, 0.0110726"); values ( \ "0.0116406, 0.148313", \ "0.0770662, 0.302091" \ ); } fall_transition (delay_template_2x2) { index_1 ("0.0004, 0.48"); index_2 ("0.0001, 0.0110726"); values ( \ "0.0155637, 0.276472", \ "0.0822542, 0.317405" \ ); } } timing () { related_pin : "q"; sdf_cond : "clk == 1'b0 & d == 1'b0"; timing_sense : negative_unate; timing_type : combinational; when : "!clk * !d"; cell_rise (delay_template_2x2) { index_1 ("0.0004, 0.48"); index_2 ("0.0001, 0.0110726"); values ( \ "0.0132991, 0.17021", \ "0.103749, 0.336197" \ ); } rise_transition (delay_template_2x2) { index_1 ("0.0004, 0.48"); index_2 ("0.0001, 0.0110726"); values ( \ "0.0195318, 0.337314", \ "0.090796, 0.376386" \ ); } cell_fall (delay_template_2x2) { index_1 ("0.0004, 0.48"); index_2 ("0.0001, 0.0110726"); values ( \ "0.0139669, 0.187189", \ "0.0788103, 0.327954" \ ); } fall_transition (delay_template_2x2) { index_1 ("0.0004, 0.48"); index_2 ("0.0001, 0.0110726"); values ( \ "0.0187264, 0.357245", \ "0.0804799, 0.388633" \ ); } } timing () { related_pin : "q"; timing_sense : negative_unate; timing_type : combinational; cell_rise (delay_template_2x2) { index_1 ("0.0004, 0.48"); index_2 ("0.0001, 0.0110726"); values ( \ "0.0143939, 0.171279", \ "0.108099, 0.336393" \ ); } rise_transition (delay_template_2x2) { index_1 ("0.0004, 0.48"); index_2 ("0.0001, 0.0110726"); values ( \ "0.0273217, 0.343498", \ "0.108586, 0.384369" \ ); } cell_fall (delay_template_2x2) { index_1 ("0.0004, 0.48"); index_2 ("0.0001, 0.0110726"); values ( \ "0.0139669, 0.187189", \ "0.0788103, 0.327954" \ ); } fall_transition (delay_template_2x2) { index_1 ("0.0004, 0.48"); index_2 ("0.0001, 0.0110726"); values ( \ "0.0187264, 0.357245", \ "0.0822542, 0.388633" \ ); } } internal_power () { related_pin : "clk"; related_pg_pin : vdd; rise_power (power_template_2x2) { index_1 ("0.0004, 0.48"); index_2 ("0.0001, 0.0110726"); values ( \ "0.000228542, 0.000229987", \ "0.000216238, 0.000223127" \ ); } fall_power (power_template_2x2) { index_1 ("0.0004, 0.48"); index_2 ("0.0001, 0.0110726"); values ( \ "0.000203812, 0.000209027", \ "0.000190939, 0.000205488" \ ); } } internal_power () { related_pin : "clk"; related_pg_pin : vss; rise_power (power_template_2x2) { index_1 ("0.0004, 0.48"); index_2 ("0.0001, 0.0110726"); values ( \ "0.000221677, 0.000206835", \ "0.000209253, 0.000203698" \ ); } fall_power (power_template_2x2) { index_1 ("0.0004, 0.48"); index_2 ("0.0001, 0.0110726"); values ( \ "0.000226586, 0.000227473", \ "0.000213767, 0.000231913" \ ); } } internal_power () { related_pin : "d"; when : "clk"; related_pg_pin : vdd; rise_power (power_template_2x2) { index_1 ("0.0004, 0.48"); index_2 ("0.0001, 0.0110726"); values ( \ "0.000339893, 0.0003513", \ "0.000340874, 0.000358588" \ ); } fall_power (power_template_2x2) { index_1 ("0.0004, 0.48"); index_2 ("0.0001, 0.0110726"); values ( \ "0.000232817, 0.000241704", \ "0.000229516, 0.00024487" \ ); } } internal_power () { related_pin : "d"; when : "clk"; related_pg_pin : vss; rise_power (power_template_2x2) { index_1 ("0.0004, 0.48"); index_2 ("0.0001, 0.0110726"); values ( \ "0.000218969, 0.000222756", \ "0.000220143, 0.000236036" \ ); } fall_power (power_template_2x2) { index_1 ("0.0004, 0.48"); index_2 ("0.0001, 0.0110726"); values ( \ "0.0003527, 0.000361121", \ "0.000349511, 0.00036432" \ ); } } } pin (clk) { clock : true; direction : input; related_ground_pin : vss; related_power_pin : vdd; max_transition : 0.48; capacitance : 0.000177069; rise_capacitance : 0.000177987; rise_capacitance_range (0.000153444, 0.000202519); fall_capacitance : 0.000176151; fall_capacitance_range (0.000150236, 0.000202066); timing () { related_pin : "clk"; sdf_cond : "adacond_d == 1'b1"; timing_type : min_pulse_width; when : "d"; rise_constraint (mpw_constraint_template_2x2) { index_1 ("0.0004, 0.48"); values ( \ "0.0349522, 0.480957" \ ); } } timing () { related_pin : "clk"; sdf_cond : "adacond_NOT_d == 1'b1"; timing_type : min_pulse_width; when : "!d"; rise_constraint (mpw_constraint_template_2x2) { index_1 ("0.0004, 0.48"); values ( \ "0.0349522, 0.480957" \ ); } } internal_power () { when : "d"; related_pg_pin : vdd; rise_power (passive_power_template_2x1) { index_1 ("0.0004, 0.48"); values ( \ "9.6022e-05, 0.000118571" \ ); } fall_power (passive_power_template_2x1) { index_1 ("0.0004, 0.48"); values ( \ "0.000206724, 0.000226934" \ ); } } internal_power () { when : "d"; related_pg_pin : vss; rise_power (passive_power_template_2x1) { index_1 ("0.0004, 0.48"); values ( \ "0.000221687, 0.000244621" \ ); } fall_power (passive_power_template_2x1) { index_1 ("0.0004, 0.48"); values ( \ "8.39374e-05, 0.000103857" \ ); } } internal_power () { when : "!d"; related_pg_pin : vdd; rise_power (passive_power_template_2x1) { index_1 ("0.0004, 0.48"); values ( \ "9.98836e-05, 0.000122285" \ ); } fall_power (passive_power_template_2x1) { index_1 ("0.0004, 0.48"); values ( \ "0.000205777, 0.000226216" \ ); } } internal_power () { when : "!d"; related_pg_pin : vss; rise_power (passive_power_template_2x1) { index_1 ("0.0004, 0.48"); values ( \ "0.000222457, 0.000245242" \ ); } fall_power (passive_power_template_2x1) { index_1 ("0.0004, 0.48"); values ( \ "8.13836e-05, 0.000101404" \ ); } } } pin (d) { direction : input; related_ground_pin : vss; related_power_pin : vdd; max_transition : 0.48; capacitance : 0.000334369; rise_capacitance : 0.000327085; rise_capacitance_range (0.000288475, 0.000396086); fall_capacitance : 0.000341653; fall_capacitance_range (0.000300382, 0.000400293); timing () { related_pin : "clk"; timing_type : hold_falling; rise_constraint (constraint_template_2x2) { index_1 ("0.0004, 0.48"); index_2 ("0.0004, 0.48"); values ( \ "-0.0122073, 0.0310232", \ "-0.063238, -0.0176025" \ ); } fall_constraint (constraint_template_2x2) { index_1 ("0.0004, 0.48"); index_2 ("0.0004, 0.48"); values ( \ "-0.0244147, 0.0111988", \ "-0.117755, -0.0678955" \ ); } } timing () { related_pin : "clk"; timing_type : setup_falling; rise_constraint (constraint_template_2x2) { index_1 ("0.0004, 0.48"); index_2 ("0.0004, 0.48"); values ( \ "0.036622, 0.0428338", \ "0.0954527, 0.0553223" \ ); } fall_constraint (constraint_template_2x2) { index_1 ("0.0004, 0.48"); index_2 ("0.0004, 0.48"); values ( \ "0.0317391, 0.0349282", \ "0.127667, 0.0804688" \ ); } } internal_power () { when : "!clk"; related_pg_pin : vdd; rise_power (passive_power_template_2x1) { index_1 ("0.0004, 0.48"); values ( \ "2.18456e-06, 2.50923e-05" \ ); } fall_power (passive_power_template_2x1) { index_1 ("0.0004, 0.48"); values ( \ "0.000187614, 0.000207047" \ ); } } internal_power () { when : "!clk"; related_pg_pin : vss; rise_power (passive_power_template_2x1) { index_1 ("0.0004, 0.48"); values ( \ "0.000198925, 0.000222796" \ ); } fall_power (passive_power_template_2x1) { index_1 ("0.0004, 0.48"); values ( \ "-3.25962e-05, -1.37022e-05" \ ); } } } latch (Iq,Iq_bar) { data_in : "d"; enable : "clk"; power_down_function : "(!vdd) + (vss)"; } } }
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